ARQUITECTURA
DEL COMPUTADOR

4.6
16 weeks
150+

Explore computer architecture fundamentals, processor design, memory hierarchy, and performance optimization. This comprehensive course covers the essential principles of how modern computers are designed and function, from basic logic circuits to complex multiprocessor systems.

CORE TOPICS

Processor Design

CPU architecture and instruction execution

Memory Systems

Cache hierarchy and virtual memory

Performance

Pipelining and optimization techniques

Parallel Systems

Multiprocessor and multicore architectures

16-WEEK CURRICULUM

1

Week 1: Introduction to Computer Architecture

To be scheduled

Historical evolution, von Neumann architecture, and performance metrics

Content to be added
2

Week 2: Digital Logic and Boolean Algebra

To be scheduled

Logic gates, Boolean expressions, and combinational circuits

Content to be added
3

Week 3: Combinational and Sequential Circuits

To be scheduled

Decoders, multiplexers, flip-flops, and state machines

Content to be added
4

Week 4: Number Systems and Arithmetic

To be scheduled

Binary arithmetic, floating-point representation, and ALU design

Content to be added
5

Week 5: Instruction Set Architecture (ISA)

To be scheduled

RISC vs CISC, addressing modes, and instruction formats

Content to be added
6

Week 6: Processor Design I

To be scheduled

Datapath design, control unit, and single-cycle implementation

Content to be added
7

Week 7: Processor Design II

To be scheduled

Multi-cycle implementation and microprogramming concepts

Content to be added
8

Week 8: Pipelining Fundamentals

To be scheduled

Pipeline stages, hazards, and forwarding techniques

Content to be added
9

Week 9: Advanced Pipelining

To be scheduled

Superscalar processors, out-of-order execution, and branch prediction

Content to be added
10

Week 10: Memory Hierarchy I

To be scheduled

Cache memory principles, direct-mapped, and associative caches

Content to be added
11

Week 11: Memory Hierarchy II

To be scheduled

Cache performance, write policies, and multilevel caches

Content to be added
12

Week 12: Virtual Memory

To be scheduled

Address translation, TLB, page tables, and memory management

Content to be added
13

Week 13: Input/Output Systems

To be scheduled

I/O devices, interrupt handling, and DMA operations

Content to be added
14

Week 14: Parallel Processing

To be scheduled

Multiprocessor systems, cache coherence, and synchronization

Content to be added
15

Week 15: Performance Analysis

To be scheduled

Benchmarking, profiling, and optimization techniques

Content to be added
16

Week 16: Emerging Technologies and Project

To be scheduled

Modern trends in computer architecture and final project presentations

Content to be added

COURSE STATUS: UNDER DEVELOPMENT

This course is currently being developed. Hardware simulations, architectural designs, and performance analysis labs will be added progressively.